This invention pertains to flip-flops in the scanning design method used in designing LSI logic units.
As the circuit size of single LSI chips increase, the time from logic designing to completing test designing during the designing period also increases, and a so-called "simplified designing" method is needed. Although scan designing represents one of such "simplified designing" methods, there has been no way to detect a failure in the "scanning circuit". Thus a means capable of detecting failures simply and certainly has been needed.